2.0 Creating The Project In Vivado
The first thing we need to do is create a new project in Vivado. Start Vivado by either double-click on the Vivado 2015.1 desktop icon or going to Start →Xilinx Design Tools→Vivado 2015.1→Vivado 2015.1. You should see the following pop-up screen.
When the New Project window pops up, click Next. You will see a New Project window pop up. Enter the following:
- Project name: clocked_led
- Project location: the directory where you want to keep the project files and subdirectories
- Keep the Create project subdirectory box checked
The window should look like this (your username probably won't be joesmith):
In the Project Type window, select RTL Project to indicate that you'll be adding your own VHDL source files and basically creating the project from scratch.
In the Add Sources window, keep all the boxes checked. Checking "Copy sources into project" will cause all of the files you're about to add to be copied into the directory you specified for your project. Add the three source files that you downloaded in Part 1: clocked_led.vhd, led_ctl.vhd, and meta_harden.vhd by clicking on the + button and selecting them. The window should look like this:
In the next window, Add Existing IP, just click Next. "IP" stands for Intellectual Property. It's basically a pre-packaged design that you can plug into your design that should just work if you set it up correctly. We will add a source clock using the "Clocking Wizard" IP later.
In the Add Constraints window, click on the + button and add the clocked_led.xdc constraints file that you downloaded in Part 1. The topic of constraints is pretty confusing. I found the Vivado Design Suite User Guide: Using Constraints manual to be a pretty good place to learn about them if you're interested. Once you've added the file, click on the Next button.
The next window that pops up is the Default Part window. Here you can specify a particular Xilinx FPGA type or a particular development board offered by Xilinx. The beauty of this is that Vivado will know all the details about your target environment, i.e. the pinout of your particular package, the number of banks, etc. For our case, we're going to be using the VC707 board, so click on Select: Boards and you should see the option for the VC707 board. Select it.
Click Next. If you got everything right, you should see the following information on the New Project Summary screen:
You should get a little status bar telling you that Vivado is building your project, and after a few seconds, your new project window pops up:
One sidenote. I created a duplicate project named clocked_led2.xpr (the .xpr is Vivado's extension for project files) on my machine because I already had a project called clocked_led.xpr. So if you ever see "clocked_led2" anywhere in this tutorial, just make a mental edit to "clocked_led".
Now, if you're new to Vivado, this project window may seem overwhelming. It still kind of is for me. There are so many different places to click and so many different sub-windows. The Project Manager sidebar is kind of like your mission control center. You can basically get to any design flow operation on it (it mimics the "flow" menu at the top of the Vivado screen). The Sources tab allows you to navigate through all of your source files, so that's another one you'll want to get familiar with. The Messages tab at the bottom will show you errors and warnings that may come up as you go through the process of synthesizing and implementing your design.
I'd recommend clicking around and seeing what the various tabs and buttons do at this point. It can be confusing how to get back and forth between important windows, and practicing will help. For the purposes of this tutorial, I'm going to dive right into building the design.
Table Of Contents
- Part 1: Getting Started
- Part 2: Creating the Project in Vivado
- Part 3: Taking a Look at the VHDL Source Code
- Part 4: Creating clk_core With the Clocking Wizard
- Part 5: Source Code for the LED Controller
- Part 6: The Constraints File clocked_led.xdc
- Part 7: Elaborating, Synthesizing, and Implementing
- Part 8: Generating and Downloading the Bitstream