1.0 An Easy First VC707 Project in Vivado - Flashing LEDs with System Clock
When I started working with the VC707 board, I felt completely overwhelmed. I did not have much experience with FPGAs or Register Transfer Languages (RTLs). I assumed the Vivado 2015 package would come with some really good introductory tutorials (after paying thousands of dollars, you'd assume it would, right?), so I started to dig into the documentation that comes with it. Unfortunately, the deeper I dug the more confused I got. If you're in this same boat, hopefully this tutorial can help you.
1.1 A Simple Example, Please?
The problem, in my opinion, is that the documentation is extremely detailed and the tutorials are extremely complex. For instance, the Built-In-Self-Test (BIST) example consists of over 330 MB of source, ip, constraint, and project files. If you wanted to go through the source code to understand how it works, you'd have to start digging through some 300 VDHL files.
Luckily, I had already taken the Essentials of FPGA Design class through Doulos, so I had access to a few more tutorials than the ones that come with the Vivado software package. The second lab we did in the class was one that involved flashing the LEDs on the Kintex UltraScale KCU105 Development Board. Still, it had been a few months since I took the class, so things weren't that fresh in my mind. Plus, the instructor ran through so much material during the two-day class that it didn't really all sink in.
I figured a good place to start was trying to get the code we used in the second lab to work on the VC707. This code is available on the Xilinx Training Page (go down to FPGA Courses→Essentials of FPGA Design→2014.3). It took me awhile, but I did manage to get it working. In my mind, it still wasn't as easy as a "Hello World" example should be, though.
So I took what I had learned in the lab and trimmed it down to the most bare-bones example I could think of: the system clock driving the eight LEDs on the VC707 at different frequencies.
1.2 What Do I Need For This Tutorial?
If you want to follow along with this tutorial, you'll need the following:
- A VC707 Evaluation Kit - this kit comes with a Virtex-7 XC7VX485T-2FFG1761C FPGA mounted on a development board that has lots of peripheral toys to play with
- The Vivado 2015 Package - the VC707 kit comes with the software, so you're in luck if you've got one
- clocked_led.vhd - the main VDHL source file that describes the "circuit"
- led_ctl.vhd - the VHDL source file that controls the LEDs
- meta_harden.vhd - a VDHL file provided by Xilinx that debounces the reset switch
- clocked_led.xdc - a constraints file that configures input and output pins
Once you've got all five of these, you should be good to go.
Table Of Contents
- Part 1: Getting Started
- Part 2: Creating the Project in Vivado
- Part 3: Taking a Look at the VHDL Source Code
- Part 4: Creating clk_core With the Clocking Wizard
- Part 5: Source Code for the LED Controller
- Part 6: The Constraints File clocked_led.xdc
- Part 7: Elaborating, Synthesizing, and Implementing
- Part 8: Generating and Downloading the Bitstream